Timer A is an 8-bit timer. it can operate as an interval timing or as a real-time clock time-base when a 32.768kHz crystal oscillator is connected.
An interrupt request can be generated when the timer overflows.
Any of eight possible clock ssignals can be output from the TMOW pin (P10). Either of the system clock or the sub-clock (32.768kHz) can be divided by 32, 16, 8 or 4 for this purpose.
When used as an interval timer, the system clock, φ, can be used as a source, divided by 8, 32, 128, 256, 512, 2048, 4096 or 8192.
There are two registers associated with Timer A:
- TMA - Timer Mode Register A
- selects the operating mode, the divided clock output, and the input clock.
TMA7..5 determine the clock divisor
TMA3 sets the operating mode
TMA2..0 determines the clock input or the overflow period
- TCA - Timer Counter A
- TCA is an 8-bit readable up-counter, incremented by internal clock input. The clock source for input to this counter is selected by bits TMA3 to TMA0 in TMA. When TCA overflows, the IRRTA bit in interrupt request register 1 (IRR1) is set to 1. TCA is cleared by setting bits TMA3 and TMA2 in TMA to B’11. TCA is initialized to H'00 after a reset.
Using the register definitions provided with GNUH8, bit TMA3 is not individually available. Instead it is grouped with TMA2..0 into a single quantity called TA.TMA.BIT.CKSI. Bits TMA7..5 are referred to as TA.TMA.BIT.CKSO
At power up or after a reset, timer A defaults to being an 8 bit interval timer with a clock source of φ/8192. So, for the development system described here, it will be running at approximately 2kHz (actually 1953Hz) and will overflow every 131ms. i.e. (256 * 8192)/16000000 seconds
When the timer overflows, IRRTA in interrupt Flag Register 1 (IRR1) will be set. If IENTA = 1 in interrupt enable register 1 (IENR1), a CPU interrupt is requested. The interrupt service routine will need to reset IRRTA when the interrupt is serviced.
With a 16MHz system clock, the available overflow periods are 131ms, 65.536ms, 32.768ms, 8.192ms, 4.096ms, 2.048ms, 512us and 128us.
Setting up as an interval timer
All that needs to be done is to calculate an appropriate clock source and a divisor. Setting TMA3 to a 1 selects the 32kHz sub-clock while leaving it at 0 selects the 16MHz system clock.
// interval timer using system clock divided by 4096 TA.TMA.BIT.CKSI = 0x01; // interval timer using sub-clock, overflow every second TA.TMA.BIT.CKSI = 0x08;
Emitting a clock signal from TMOW
First the function of pin P10/TMOW must be set, then the appropriate divisor selected for the clock.
// configure P10 to work as TMOW IO.PMR1.BIT.TMOW = 1; // then select a divisor of phi/16 for timer A TA.TMA.BIT.CKSO = 0x01;
See the projects section for examples of configuring and using timer A